mirror of
https://github.com/rtlsdrblog/rtl-sdr-blog.git
synced 2025-03-30 16:15:40 +02:00
add support for R828D tuner
Signed-off-by: Steve Markgraf <steve@steve-m.de>
This commit is contained in:
parent
230930e975
commit
e61731d230
@ -1,6 +1,6 @@
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/*
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/*
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* rtl-sdr, turns your Realtek RTL2832 based DVB dongle into a SDR receiver
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* rtl-sdr, turns your Realtek RTL2832 based DVB dongle into a SDR receiver
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* Copyright (C) 2012 by Steve Markgraf <steve@steve-m.de>
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* Copyright (C) 2012-2013 by Steve Markgraf <steve@steve-m.de>
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* Copyright (C) 2012 by Dimitri Stolnikov <horiz0n@gmx.net>
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* Copyright (C) 2012 by Dimitri Stolnikov <horiz0n@gmx.net>
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*
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*
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* This program is free software: you can redistribute it and/or modify
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* This program is free software: you can redistribute it and/or modify
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@ -175,7 +175,8 @@ enum rtlsdr_tuner {
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RTLSDR_TUNER_FC0012,
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RTLSDR_TUNER_FC0012,
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RTLSDR_TUNER_FC0013,
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RTLSDR_TUNER_FC0013,
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RTLSDR_TUNER_FC2580,
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RTLSDR_TUNER_FC2580,
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RTLSDR_TUNER_R820T
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RTLSDR_TUNER_R820T,
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RTLSDR_TUNER_R828D
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};
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};
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/*!
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/*!
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@ -26,8 +26,11 @@
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#define R82XX_H
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#define R82XX_H
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#define R820T_I2C_ADDR 0x34
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#define R820T_I2C_ADDR 0x34
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#define R820T_CHECK_ADDR 0x00
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#define R828D_I2C_ADDR 0x74
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#define R820T_CHECK_VAL 0x69
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#define R828D_XTAL_FREQ 16000000
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#define R82XX_CHECK_ADDR 0x00
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#define R82XX_CHECK_VAL 0x69
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#define R82XX_IF_FREQ 3570000
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#define R82XX_IF_FREQ 3570000
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@ -66,7 +69,6 @@ struct r82xx_config {
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uint32_t xtal;
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uint32_t xtal;
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enum r82xx_chip rafael_chip;
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enum r82xx_chip rafael_chip;
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unsigned int max_i2c_msg_len;
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unsigned int max_i2c_msg_len;
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int use_diplexer;
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int use_predetect;
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int use_predetect;
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};
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};
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@ -79,6 +81,7 @@ struct r82xx_priv {
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uint16_t pll; /* kHz */
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uint16_t pll; /* kHz */
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uint32_t int_freq;
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uint32_t int_freq;
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uint8_t fil_cal_code;
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uint8_t fil_cal_code;
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uint8_t input;
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int has_lock;
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int has_lock;
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int init_done;
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int init_done;
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@ -184,13 +184,18 @@ int fc2580_set_gain_mode(void *dev, int manual) { return 0; }
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int r820t_init(void *dev) {
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int r820t_init(void *dev) {
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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devt->r82xx_p.rtl_dev = dev;
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devt->r82xx_p.rtl_dev = dev;
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if (devt->tuner_type == RTLSDR_TUNER_R828D) {
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devt->r82xx_c.i2c_addr = R828D_I2C_ADDR;
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devt->r82xx_c.rafael_chip = CHIP_R828D;
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} else {
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devt->r82xx_c.i2c_addr = R820T_I2C_ADDR;
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devt->r82xx_c.i2c_addr = R820T_I2C_ADDR;
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devt->r82xx_c.rafael_chip = CHIP_R820T;
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}
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rtlsdr_get_xtal_freq(devt, NULL, &devt->r82xx_c.xtal);
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rtlsdr_get_xtal_freq(devt, NULL, &devt->r82xx_c.xtal);
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devt->r82xx_c.rafael_chip = CHIP_R820T;
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devt->r82xx_c.max_i2c_msg_len = 2;
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devt->r82xx_c.max_i2c_msg_len = 2;
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devt->r82xx_c.use_diplexer = 0;
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devt->r82xx_c.use_predetect = 0;
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devt->r82xx_c.use_predetect = 0;
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devt->r82xx_p.cfg = &devt->r82xx_c;
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devt->r82xx_p.cfg = &devt->r82xx_c;
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@ -214,6 +219,7 @@ int r820t_set_gain_mode(void *dev, int manual) {
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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return r82xx_set_gain(&devt->r82xx_p, manual, 0);
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return r82xx_set_gain(&devt->r82xx_p, manual, 0);
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}
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}
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/* definition order must match enum rtlsdr_tuner */
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/* definition order must match enum rtlsdr_tuner */
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static rtlsdr_tuner_iface_t tuners[] = {
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static rtlsdr_tuner_iface_t tuners[] = {
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{
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{
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@ -244,6 +250,11 @@ static rtlsdr_tuner_iface_t tuners[] = {
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r820t_set_freq, r820t_set_bw, r820t_set_gain, NULL,
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r820t_set_freq, r820t_set_bw, r820t_set_gain, NULL,
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r820t_set_gain_mode
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r820t_set_gain_mode
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},
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},
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{
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r820t_init, r820t_exit,
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r820t_set_freq, r820t_set_bw, r820t_set_gain, NULL,
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r820t_set_gain_mode
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},
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};
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};
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typedef struct rtlsdr_dongle {
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typedef struct rtlsdr_dongle {
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@ -892,7 +903,7 @@ int rtlsdr_get_tuner_gains(rtlsdr_dev_t *dev, int *gains)
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63, 65, 67, 68, 70, 71, 179, 181, 182,
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63, 65, 67, 68, 70, 71, 179, 181, 182,
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184, 186, 188, 191, 197 };
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184, 186, 188, 191, 197 };
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const int fc2580_gains[] = { 0 /* no gain values */ };
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const int fc2580_gains[] = { 0 /* no gain values */ };
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const int r820t_gains[] = { 0, 9, 14, 27, 37, 77, 87, 125, 144, 157,
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const int r82xx_gains[] = { 0, 9, 14, 27, 37, 77, 87, 125, 144, 157,
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166, 197, 207, 229, 254, 280, 297, 328,
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166, 197, 207, 229, 254, 280, 297, 328,
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338, 364, 372, 386, 402, 421, 434, 439,
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338, 364, 372, 386, 402, 421, 434, 439,
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445, 480, 496 };
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445, 480, 496 };
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@ -918,7 +929,8 @@ int rtlsdr_get_tuner_gains(rtlsdr_dev_t *dev, int *gains)
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ptr = fc2580_gains; len = sizeof(fc2580_gains);
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ptr = fc2580_gains; len = sizeof(fc2580_gains);
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break;
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break;
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case RTLSDR_TUNER_R820T:
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case RTLSDR_TUNER_R820T:
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ptr = r820t_gains; len = sizeof(r820t_gains);
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case RTLSDR_TUNER_R828D:
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ptr = r82xx_gains; len = sizeof(r82xx_gains);
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break;
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break;
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default:
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default:
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ptr = unknown_gains; len = sizeof(unknown_gains);
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ptr = unknown_gains; len = sizeof(unknown_gains);
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@ -1103,7 +1115,8 @@ int rtlsdr_set_direct_sampling(rtlsdr_dev_t *dev, int on)
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rtlsdr_set_i2c_repeater(dev, 0);
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rtlsdr_set_i2c_repeater(dev, 0);
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}
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}
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if (dev->tuner_type == RTLSDR_TUNER_R820T) {
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if ((dev->tuner_type == RTLSDR_TUNER_R820T) ||
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(dev->tuner_type == RTLSDR_TUNER_R828D)) {
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r |= rtlsdr_set_if_freq(dev, R82XX_IF_FREQ);
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r |= rtlsdr_set_if_freq(dev, R82XX_IF_FREQ);
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/* enable spectrum inversion */
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/* enable spectrum inversion */
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@ -1145,7 +1158,8 @@ int rtlsdr_set_offset_tuning(rtlsdr_dev_t *dev, int on)
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if (!dev)
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if (!dev)
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return -1;
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return -1;
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if (dev->tuner_type == RTLSDR_TUNER_R820T)
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if ((dev->tuner_type == RTLSDR_TUNER_R820T) ||
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(dev->tuner_type == RTLSDR_TUNER_R828D))
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return -2;
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return -2;
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if (dev->direct_sampling)
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if (dev->direct_sampling)
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@ -1432,27 +1446,19 @@ int rtlsdr_open(rtlsdr_dev_t **out_dev, uint32_t index)
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goto found;
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goto found;
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}
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}
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reg = rtlsdr_i2c_read_reg(dev, R820T_I2C_ADDR, R820T_CHECK_ADDR);
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reg = rtlsdr_i2c_read_reg(dev, R820T_I2C_ADDR, R82XX_CHECK_ADDR);
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if (reg == R820T_CHECK_VAL) {
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if (reg == R82XX_CHECK_VAL) {
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fprintf(stderr, "Found Rafael Micro R820T tuner\n");
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fprintf(stderr, "Found Rafael Micro R820T tuner\n");
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dev->tuner_type = RTLSDR_TUNER_R820T;
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dev->tuner_type = RTLSDR_TUNER_R820T;
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/* disable Zero-IF mode */
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rtlsdr_demod_write_reg(dev, 1, 0xb1, 0x1a, 1);
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/* only enable In-phase ADC input */
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rtlsdr_demod_write_reg(dev, 0, 0x08, 0x4d, 1);
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/* the R820T uses 3.57 MHz IF for the DVB-T 6 MHz mode, and
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* 4.57 MHz for the 8 MHz mode */
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rtlsdr_set_if_freq(dev, R82XX_IF_FREQ);
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/* enable spectrum inversion */
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rtlsdr_demod_write_reg(dev, 1, 0x15, 0x01, 1);
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goto found;
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goto found;
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}
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}
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reg = rtlsdr_i2c_read_reg(dev, R828D_I2C_ADDR, R82XX_CHECK_ADDR);
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if (reg == R82XX_CHECK_VAL) {
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fprintf(stderr, "Found Rafael Micro R828D tuner\n");
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dev->tuner_type = RTLSDR_TUNER_R828D;
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}
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/* initialise GPIOs */
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/* initialise GPIOs */
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rtlsdr_set_gpio_output(dev, 5);
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rtlsdr_set_gpio_output(dev, 5);
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@ -1476,14 +1482,35 @@ int rtlsdr_open(rtlsdr_dev_t **out_dev, uint32_t index)
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}
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}
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found:
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found:
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if (dev->tuner_type == RTLSDR_TUNER_UNKNOWN) {
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/* use the rtl clock value by default */
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dev->tun_xtal = dev->rtl_xtal;
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dev->tuner = &tuners[dev->tuner_type];
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switch (dev->tuner_type) {
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case RTLSDR_TUNER_R828D:
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dev->tun_xtal = R828D_XTAL_FREQ;
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case RTLSDR_TUNER_R820T:
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/* disable Zero-IF mode */
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rtlsdr_demod_write_reg(dev, 1, 0xb1, 0x1a, 1);
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/* only enable In-phase ADC input */
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rtlsdr_demod_write_reg(dev, 0, 0x08, 0x4d, 1);
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/* the R82XX use 3.57 MHz IF for the DVB-T 6 MHz mode, and
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* 4.57 MHz for the 8 MHz mode */
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rtlsdr_set_if_freq(dev, R82XX_IF_FREQ);
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/* enable spectrum inversion */
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rtlsdr_demod_write_reg(dev, 1, 0x15, 0x01, 1);
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break;
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case RTLSDR_TUNER_UNKNOWN:
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fprintf(stderr, "No supported tuner found\n");
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fprintf(stderr, "No supported tuner found\n");
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rtlsdr_set_direct_sampling(dev, 1);
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rtlsdr_set_direct_sampling(dev, 1);
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break;
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default:
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break;
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}
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}
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dev->tuner = &tuners[dev->tuner_type];
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dev->tun_xtal = dev->rtl_xtal; /* use the rtl clock value by default */
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if (dev->tuner->init)
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if (dev->tuner->init)
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r = dev->tuner->init(dev);
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r = dev->tuner->init(dev);
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@ -31,9 +31,8 @@
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#include "tuner_r82xx.h"
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#include "tuner_r82xx.h"
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
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#define MHZ(x) ((x)*1000*1000)
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#define VCO_POWER_REF 0x02
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#define KHZ(x) ((x)*1000)
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#define DIP_FREQ 32000000
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/*
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/*
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* Static constants
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* Static constants
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@ -430,13 +429,14 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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uint8_t mix_div = 2;
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uint8_t mix_div = 2;
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uint8_t div_buf = 0;
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uint8_t div_buf = 0;
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uint8_t div_num = 0;
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uint8_t div_num = 0;
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uint8_t vco_power_ref = 2;
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uint8_t refdiv2 = 0;
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uint8_t refdiv2 = 0;
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uint8_t ni, si, nint, vco_fine_tune, val;
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uint8_t ni, si, nint, vco_fine_tune, val;
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uint8_t data[5];
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uint8_t data[5];
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/* Frequency in kHz */
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/* Frequency in kHz */
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freq_khz = (freq + 500) / 1000;
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freq_khz = (freq + 500) / 1000;
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pll_ref = priv->cfg->xtal; // / 1000;
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pll_ref = priv->cfg->xtal;
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pll_ref_khz = (priv->cfg->xtal + 500) / 1000;
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pll_ref_khz = (priv->cfg->xtal + 500) / 1000;
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rc = r82xx_write_reg_mask(priv, 0x10, refdiv2, 0x10);
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rc = r82xx_write_reg_mask(priv, 0x10, refdiv2, 0x10);
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@ -471,11 +471,14 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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if (rc < 0)
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if (rc < 0)
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return rc;
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return rc;
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if (priv->cfg->rafael_chip == CHIP_R828D)
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vco_power_ref = 1;
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vco_fine_tune = (data[4] & 0x30) >> 4;
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vco_fine_tune = (data[4] & 0x30) >> 4;
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if (vco_fine_tune > VCO_POWER_REF)
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if (vco_fine_tune > vco_power_ref)
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div_num = div_num - 1;
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div_num = div_num - 1;
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else if (vco_fine_tune < VCO_POWER_REF)
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else if (vco_fine_tune < vco_power_ref)
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div_num = div_num + 1;
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div_num = div_num + 1;
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rc = r82xx_write_reg_mask(priv, 0x10, div_num << 5, 0xe0);
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rc = r82xx_write_reg_mask(priv, 0x10, div_num << 5, 0xe0);
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@ -486,8 +489,8 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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nint = vco_freq / (2 * pll_ref);
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nint = vco_freq / (2 * pll_ref);
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vco_fra = (vco_freq - 2 * pll_ref * nint) / 1000;
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vco_fra = (vco_freq - 2 * pll_ref * nint) / 1000;
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if (nint > 63) {
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if (nint > ((128 / vco_power_ref) - 1)) {
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fprintf(stderr, "No valid PLL values for %u kHz!\n", freq);
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fprintf(stderr, "[R82XX] No valid PLL values for %u Hz!\n", freq);
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -545,6 +548,7 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
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}
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}
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if (!(data[2] & 0x40)) {
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if (!(data[2] & 0x40)) {
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printf("[R82XX] PLL not locked!\n");
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priv->has_lock = 0;
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priv->has_lock = 0;
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return 0;
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return 0;
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}
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}
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@ -628,17 +632,6 @@ static int r82xx_sysfreq_sel(struct r82xx_priv *priv, uint32_t freq,
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break;
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break;
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}
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}
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if (priv->cfg->use_diplexer &&
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((priv->cfg->rafael_chip == CHIP_R820T) ||
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(priv->cfg->rafael_chip == CHIP_R828S) ||
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(priv->cfg->rafael_chip == CHIP_R820C))) {
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if (freq > DIP_FREQ)
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air_cable1_in = 0x00;
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else
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air_cable1_in = 0x60;
|
|
||||||
cable2_in = 0x00;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (priv->cfg->use_predetect) {
|
if (priv->cfg->use_predetect) {
|
||||||
rc = r82xx_write_reg_mask(priv, 0x06, pre_dect, 0x40);
|
rc = r82xx_write_reg_mask(priv, 0x06, pre_dect, 0x40);
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
@ -658,6 +651,8 @@ static int r82xx_sysfreq_sel(struct r82xx_priv *priv, uint32_t freq,
|
|||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
return rc;
|
return rc;
|
||||||
|
|
||||||
|
priv->input = air_cable1_in;
|
||||||
|
|
||||||
/* Air-IN only for Astrometa */
|
/* Air-IN only for Astrometa */
|
||||||
rc = r82xx_write_reg_mask(priv, 0x05, air_cable1_in, 0x60);
|
rc = r82xx_write_reg_mask(priv, 0x05, air_cable1_in, 0x60);
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
@ -675,11 +670,6 @@ static int r82xx_sysfreq_sel(struct r82xx_priv *priv, uint32_t freq,
|
|||||||
rc = r82xx_write_reg_mask(priv, 0x0a, filter_cur, 0x60);
|
rc = r82xx_write_reg_mask(priv, 0x0a, filter_cur, 0x60);
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
return rc;
|
return rc;
|
||||||
/*
|
|
||||||
* Original driver initializes regs 0x05 and 0x06 with the
|
|
||||||
* same value again on this point. Probably, it is just an
|
|
||||||
* error there
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Set LNA
|
* Set LNA
|
||||||
@ -1088,8 +1078,7 @@ int r82xx_set_freq(struct r82xx_priv *priv, uint32_t freq)
|
|||||||
{
|
{
|
||||||
int rc = -EINVAL;
|
int rc = -EINVAL;
|
||||||
uint32_t lo_freq = freq + priv->int_freq;
|
uint32_t lo_freq = freq + priv->int_freq;
|
||||||
|
uint8_t air_cable1_in;
|
||||||
lo_freq = freq + priv->int_freq;
|
|
||||||
|
|
||||||
rc = r82xx_set_mux(priv, lo_freq);
|
rc = r82xx_set_mux(priv, lo_freq);
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
@ -1099,6 +1088,18 @@ int r82xx_set_freq(struct r82xx_priv *priv, uint32_t freq)
|
|||||||
if (rc < 0 || !priv->has_lock)
|
if (rc < 0 || !priv->has_lock)
|
||||||
goto err;
|
goto err;
|
||||||
|
|
||||||
|
/* switch between 'Cable1' and 'Air-In' inputs on sticks with
|
||||||
|
* R828D tuner. We switch at 345 MHz, because that's where the
|
||||||
|
* noise-floor has about the same level with identical LNA
|
||||||
|
* settings. The original driver used 320 MHz. */
|
||||||
|
air_cable1_in = (freq > MHZ(345)) ? 0x00 : 0x60;
|
||||||
|
|
||||||
|
if ((priv->cfg->rafael_chip == CHIP_R828D) &&
|
||||||
|
(air_cable1_in != priv->input)) {
|
||||||
|
priv->input = air_cable1_in;
|
||||||
|
rc = r82xx_write_reg_mask(priv, 0x05, air_cable1_in, 0x60);
|
||||||
|
}
|
||||||
|
|
||||||
err:
|
err:
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
fprintf(stderr, "%s: failed=%d\n", __func__, rc);
|
fprintf(stderr, "%s: failed=%d\n", __func__, rc);
|
||||||
@ -1234,8 +1235,6 @@ int r82xx_init(struct r82xx_priv *priv)
|
|||||||
goto err;
|
goto err;
|
||||||
|
|
||||||
rc = r82xx_sysfreq_sel(priv, 0, TUNER_DIGITAL_TV, SYS_DVBT);
|
rc = r82xx_sysfreq_sel(priv, 0, TUNER_DIGITAL_TV, SYS_DVBT);
|
||||||
if (rc < 0)
|
|
||||||
goto err;
|
|
||||||
|
|
||||||
err:
|
err:
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
|
Loading…
x
Reference in New Issue
Block a user